Traditionally, CPCI architectures have shined in the telecommunication market, serving as a key ingredient for building central office equipment, telecommunication switches, and more. Additionally, these boards have started to make some big in roads in the voice-over-IP (VoIP) and wireless sectors.

The problem, according to Jerry Krasner, executive director of CMP Media's Electronics Market Forecasters, is that CPCI boards have become a commodity product dominated by a few players. And, Krasner says, you must keep in mind that CPCI board developers are losing some of their business as telecommunications providers move from packet-switching architectures to all-optical networks.

These changes, Krasner says, are problematic for the CPCI board market. Thus to survive, board vendors must re-evaluate their design offerings and deliver more of a systems-level solution that integrates hardware and software options.

In fact, board developers are building up their in-house development teams, bringing on systems experts, re-evaluating backplane architectures, and supporting more and more software solutions. But this evolution is making the board selection process an even tougher task. So here's a guide to steer you though the selection process when choosing CPCI board solutions.

What to look for

Clearly, choosing a board architecture is a difficult task. In the past, designers could make judgments based on interfaces offered, processor schemes, hot-swap capabilities, and a host of other hardware options. These same criteria are still the basis for choices today. But, that's only half the selection process. With software becoming a more important ingredient in the overall development process, engineers need to ask new/additional questions when selecting a board architecture.

"In general, developers who are looking at CPCI boards need to ask for three things: first, does the board meet the baseline functional requirements for the application, such as the required interfaces, channel density, and protocol support? Second, does the board and the architecture on which it's based offer sufficient headroom to scale the application and run at high performance? Third, does the board offer a development environment that will support fast application development, enhancement, troubleshooting, and support?" says Josh Adelson, director of market development for Brooktrout Technology (Needham, MA).

Adding to that, George Pennington, vice president of engineering, SBS Technologies, Inc. (Mansfield, MA) says, "A vendor should be able to modify existing designs to 'exactly' fit your application needs, if necessary." Rodger H. Hosking, vice-president of marketing at Pentek, Inc. (Upper Saddle River, NJ) notes that specifiers should also evaluate the power and cooling requirements for the board.

Without question, one of the key areas of focus should be on high availability. Some members of the design community initially thought that CPCI, because of its hot-swap nature, immediately denoted high availability. The thought was that by having the ability to swap boards, CPCI systems would inherently reduce system downtime.

While that is true, simply having a CPCI board is not enough to reach the coveted five 9s reliability levels and beyond. Thus, when evaluating boards, designers must ask: Does the system provide a high availability RTOS? Does the system deliver high availability middleware? And how has the board been architected to support hot failovers?

Operating system support is becoming a critical design to ensure high availability. For instance, according to Gordon Finlay, technical analyst at Spectrum Signal Processing (Burnaby, BC, Canada), one of the requirements for CPCI systems is compliance with the the Software Communications Architecture (SCA). Originally developed for the Joint Tactical Radio System (JTRS) and now being standardized by the Software Defined Radio (SDR) Forum, this standard requires that CPCI systems support the POSIX 1003.13 PSE-52 real-time application environment profile (AEP) for portability of waveforms, and scalability of the architecture. The JTRS program, for instance, has selected Wind River's VxWorks operating system and the LynxOS as the two RTOS systems for SCA-compliance.

Memory needs

Yet another key consideration is memory capacity. As communication systems become more complex, higher levels of memory are required to store table lookups and control code, to hold critical boot codes, and to handle the higher data floating through a system. That puts some big strains on the memory subsystem on Compact PCI boards.

Therefore, designers need to know the overall memory capacity that a board architecture can support. Board vendors agree that a minimum of 64 MB of synchronous dynamic RAM (SDRAM) should be supported in the system architecture. Additionally, the board's memory subsystem should offer expansion capabilities so that it can scale to 1 GB and beyond. In addition to SDRAM, the board must also support a healthy degree of flash memory to store critical data such as boot codes.

On top of memory, here are a few other general requirements that designers should seek:

1. Processor type and performance vs. power (heat). Make sure you are getting the processing power and bandwidth to accommodate future growth in your application.
2. Peripheral support (such as serial, Ethernet, and IDE). Ethernet is critical for software development, OS booting, and file system management.
3. Hot-swap support. At a minimum make sure the board supports the hot-plug capability. It is preferable if the software includes support for full hot swap. This means there are hot-swap drivers and support for ENUM handling.
4. Telecom requirement compliance. Depending on the application, designers should look into which telecom requirements such as NEBS, UL, and FCC must be met.
5. Front panel connector options.

Additional requirements that should be taken into consideration include power consumption (watts per slot), heat dissipation, rear-mounted operations, administration and maintenance (OA&M) components such as alarm modules, and rack height.

"Obviously the most important issues are functionality and performance appropriate for your application, and a vendor you are comfortable with," says Brough Turner, CTO of NMS Communications (Framingham, MA). "Beyond that, look at what level of PICMG compliance is offered. If hot swap is required, be sure the board's hardware is 'hot-swap friendly' and that hot swap drivers are provided with the board. Depending on the host computer OS, these may be 'specific use' drivers (which can be written for any OS) or 'general use' drivers (only available with some OSes that have explicit CPCI support or PCI Plug 'n Play support - Windows 2000 for example)."

Communications specifics

The criteria above provide a general glimpse at what designers should look for in a CPCI board. But, as designers well know, the communication sector has some specific requirements that set it apart from the rest. Thus, let's look at some key telecom requirements to remember when choosing a CPCI board.

According to Felix Diaz, vice president and general manager of Telecom Products Group at Interphase (Plano, TX), there are three critical features for CPCI in telecom applications. These include the telephony bus, intelligent boards, and PCI mezzanine card (PMC) site.

The telephony bus must offer access to the H.110 telephony bus or a switched fabric (such as CPCI packet-switched backplane [CPSB]) in order to allow peer-to-peer communications. This type of CPCI architecture enables non-system slot CPUs to communicate across the backplane, off loading processing from the host, thus enabling better overall system performance through a distributed architecture. The backplanes have evolved to accommodate more bandwidth and processing power on the slot-level, enabling higher performance on the entire system.

Distributed CPCI environments also call for intelligence at the board-level, including non-system slot CPUs and specialized I/O controllers, for example. With protocol processing at the board-level and peer-to-peer communications across the backplane, the demand for host CPU processing is minimized and the overall performance and ability to handle multiple applications on one system is maximized.

Many CPCI boards are becoming systems on a board, and designers can configure them into multiple applications by adding PMCs. These modular form factors can snap onto the CPCI board and are available for various types of I/O, digital signal processors (DSPs), and processor boards, enabling CPCI systems that can serve multiple functions or applications.

This type of system on a board approach protects the investment of the equipment provider by allowing specialized slots instead of servers for different applications. Additionally, the approach provides the flexibility to enable different applications on one common design, with various options for PMC add-ons that define the specialized purpose of the slot.

What's in store

With the uncertainty about which technology will win out in the "last mile," and with telecommunication carriers switching to optical solutions, how does the future look for CPCI? One thing is clear, switch fabrics will play a bigger role in the board development process.

"CPCI is headed for a major shift in direction due to the PICMG 2.16 packet switch specification," says Bob Ehlers, product line manager for CPCI and single board computer (SBC) products at Intel. "With the advent of packet switching on the backplane, the form factor for CPCI lends itself very well to application support in a variety of environments beyond telecommunications, such as web servers, mail servers, and ftp servers," Ehlers adds.

"The CPCI community is continually studying options for the evolution of CPCI," says Dennis Liles, product marketing manager in Motorola Computer Group's Telecom Business Unit (Tempe, AZ). "The hottest activity right now is centered on the study of how switch fabrics can be used to extend CPCI into the next generation. Gigabit Ethernet, StarFabric (see sidebar), Infiniband and many other switch fabrics are being evaluated for their ability to increase data throughput in applications where CPCI has been popular."

"We see Ethernet, or a combination of Ethernet and StarFabric, eventually replacing the need for the electrical PCI bus on the CPCI backplane," NMS' Turner says. "In addition, we expect many of the individual boards within CPCI systems to evolve into autonomous modules. The result will be more scaleable systems with better support for packet-based applications, and an architecture that more easily supports the development of highly available systems."

"CPCI boards will evolve to become more intelligent, and with the use of new switched fabric interconnects, the PCI bus will not be used for traffic, rather for administrative functions, such as maintenance and alarms," Diaz predicts. " In this fashion, the host processor will become the administrator for the system, and not the bottleneck for all transactions to pass through as they are exchanged directly over the backplane. As this distributed architecture evolves to allow multiple applications residing on various slots, CPCI will become more multi-purpose in nature, especially for telecom designs."

A New niche

SBS' Pennington predicts that CPCI will find a new niche, "As the need for higher throughput increases in the communication segment, other higher-speed interconnects will emerge to support this. As a result, CPCI will be used more as the command and control bus alongside one of the other higher speed interconnects used for data movement."

In terms of smaller form factors or "mini" CPCI, many vendors see limited applications for these. In fact, Dick Somes, director of standardization at Force Computers (San Jose, CA), sees more interest in larger boards. "I think a larger form factor variant of CPCI incorporating switched serial I/O and/or networking architectures is a distinct possibility."

The ultimate success of CPCI, of course, will depend on its fit for new applications. But, in the meantime, it seems to be a reliable form factor for telecommunications.

Acknowledgement

The author would like to thank Bob Ehlers, product line manager, CompactPCI Chasses and Single Board Computer Products, Intel (formerly Ziatech), Jason Bailis, Product Line Manager, CompactPCI Peripheral Products, Intel (formerly Dialogic), and Stephen Christo, Marketing Manager, StarFabric Alliance for their help with background information.

Author's note:

For more information on the CPCI specification, contact PICMG at www.picmg.com. For more information on the StarFabric alliance, go to www.starfabric.com.

Janine Sullivan is the president of The Write Solution based in Parsippany, NJ. She was formerly the chief editor for Communications Products magazine. She holds a BA from the University of Delaware and an MA from Duquense University. She can be contacted at write2@mindspring.com.

Sidebar: Alternative Switching in CompactPCI Systems

The StarFabric technology is an open-access switch fabric architecture that is designed to enable the simple scaling of connections and bandwidth. Developed by StarGen (Marlborough, MA), the architecture is 100% backward compatible with PCI, which allows the use of existing device drivers, BIOS, and operating system support in current CompactPCI systems.

The switch fabric is based on point-to-point LVDS connections which allow for high-speed CompactPCI backplane designs utilizing standard printed circuit board construction and existing 2-mm connectors. Chassis-to-chassis interconnects up to five meters are also realizable using standard CAT-5 twisted-pair cable.

The StarFabric Working Group was officially announced in January 2001 and consists of a group of leading communications industry companies that are developing proof of concept designs based on StarFabric technology. The group expects that each design will demonstrate how the switch fabric-based systems can address the critical communication requirements including scalability, flexibility, high availability, and quality of service, while maintaining compatibility with CompactPCI.

The PCI Industrial Computer Manufacturing Group (PICMG) is also establishing a subcommittee, PICMG 2.17, to develop system-level specifications for StarFabric. As of July, sixty-two companies have signed up to participate in PICMG 2.17. The objective of the subcommittee is to develop a common set of requirements for implementing CompactPCI boards and backplanes using the StarFabric interconnect. In addition to the PICMG effort, a consortium is planned by the StarFabric Working Group that will be responsible for managing the protocol.