How does a developer of large scale applications choose the right primary bus, and the best secondary interconnect to deliver the maximum throughput for his or her application? The choice is wide, but each bus system has its own built-in strengths and weaknesses, and is optimized for its own class of applications.

Primary Bus Architecture: Still VME
VME dominates the high-end, high performance, embedded systems arena. Although CompactPCI and PCI have emerged as viable systems buses, these products are generally chosen for embedded development projects where small system footprints and modest computing horsepower are required. Applications include telephony, medical imaging, and document/graphic imaging.

VME and its secondary buses (FPDP, Myrinet, RACE, and SKYchannel) are still the buses of choice for large scale embedded development projects in defense, military, and other demanding computing environments. Most industry watchers predict that VME will continue as the defacto standard in a wide range of large multiprocessing applications, and in particular in high speed signal processing projects that focuse on very computing-intensive applications.

You can increase bandwidth by configuring VME to handle the command and control aspects of an embedded subsystem and by using secondary buses to supplement the main VME bus. Secondary buses are dedicated to interprocessor communications and I/O and generally operate over the VME P2 connector. At speeds of 160 Mbytes/sec to 320 Mbytes/sec, they are an alternate means for moving data as fast as quickly as the microprocessor can handle it.

The most widely implemented of the P2 buses are SKYchannel and RACE. Another supplementary bus, the Front Panel Data Port, or FPDP, provides further I/O capabilities off the front panel of the VME board at rates of 160 MB/sec. FPDP is especially important for data acquisition applications, where data from multiple channels must be acquired and processed. FPDP can be used in addition to the P2 buses.

Choosing the Right Interconnect
When evaluating which secondary bus to use, at the simplest level, the determinants can be reduced to current deliverable speed and future upgrade path. For example, SKYchannel provides a 320 Mbytes/sec non-blocking packet switched interconnect. The ANSI standard RACE architecture, developed by Mercury Computer, is a circuit-switch bus. The new RACE++ upgrade path is estimated to deliver 267 Mbytes/sec.

InfiniBand And RapidIO
Up and coming connectivity contenders, the Infiniband and RapidIO architectures use channel and packet technology and promise interconnect performance of 1 GB and faster. However, it will be well over a year before they are implemented in real products with performance numbers and delivery schedules. Designers with 12 to 18 month development cycles are cautioned that these architectures are just emerging. For the immediate future, designers may want to use the SKYchannel or the RACE interconnects with the option of easily moving to InfiniBand or RapidIO as these products become available.

For demanding signal processing applications with significant data acquisition and processing requirements, augmenting the P2 bus with an FPDP solution enhances the overall productivity of the system and may reduce the overall number of boards used in the system.

The InfiniBand Trade Association joined together computing industry leaders, Compaq, Dell, Hewlett-Packard, IBM, Intel, Microsoft, and Sun Microsystems in an effort to develop a new common I/O specification that delivers a channel-based, switched fabric technology for industry adoption.

Initially, InfiniBand technology will be used to connect servers to remote storage and networking devices, as well as to other servers. InfiniBand will also be used inside servers for inter-processor communication in parallel clusters. Embedded high-performance computer vendors are reviewing the standard and considering it as an efficient way to connect chassis to chassis. Because it is channel-based, the InfiniBand is a natural extension of the similar SKYchannel architecture.

Leading network companies Cisco, Lucent, and Nortel joined Motorola in establishing the trade association that will direct the future development and adoption of the RapidIO architecture. SKY Computers and Mercury Computer are also participating in the RapidIO association. RapidIO is also natural progression from SKYchannel because RapidIO uses many of SKYchannel's key architectural components, including the non-blocking packet switch architecture for high performance communication. A developer choosing SKYchannel today will be able to easily migrate to the RapidIO architecture when it becomes available.

Issues for Consideration
A serial bus fabric like Infiniband's raises potential latency issues, and for many applications latency is more important than raw bandwidth. The investment required to tune the performance of a complex fabric is often less than obvious.

Theoretical bandwidth numbers reported by Rapid IO are impressive, but the achieved bandwidth is affected by the fabric design, packet size, and packet collisions as they go through the fabric. Future interconnect architectures should have mechanisms to help evaluate the communications characteristics of the application. Software tools must be provided to help the application engineer easily tune the application to get the best achieved performance.

In addition to issues of performance, ease of development, and software, when considering the next generation of interconnect, developers must also review reliability, availability, supportability, and ease of manufacturing. As interconnect architectures deliver more speed, designers must ensure that the embedded system will minimize overall product development time and cost.

It is too early to predict whether InfiniBand or RapidIO will gain the most favor in the market. Both are extensions of interconnect architectures that have been in development for several years. Both can provide significant performance advantages. Embedded system designers will continue to evaluate both current architectural approaches and the new contenders based upon the requirements of their individual programs and schedules.