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Danielle Coffing
joined Motorola Semiconductor Products Sector in Tempe, AZ in 1997.
Since then, she has worked in the area of high-frequency analog
integrated circuit design and development. She holds one patent and
has seven pending. She received her BSEE and MSEE degrees from the
Massachusetts Institute of Technology in 1996 and 1997,
respectively.
Eric Main joined Motorola Semiconductor Products Sector in 1970.
Since then, he has worked in the area of analog integrated circuit
design and development. He received his B.Sc.(Eng) in electrical
engineering from the University of Aberdeen, Scotland in 1965. He
holds 41 patents and has seven pending.
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In an FM signal, the modulation is the
deviation of a carrier from its nominal frequency. The conventional
method to demodulate this signal is to convert frequency deviation
to phase and detect the change of phase. In the quadrature
demodulator, the modulated carrier is passed through an LC tank
circuit that shifts the signal by 90° at the center frequency.
This phase shift is either greater or less than 90° depending
on the direction of deviation. A phase detector compares the
phase-shifted signal to the original to give the demodulated
baseband signal. You use quadrature demodulators not only for
frequency modulation, but also with digital modulation schemes such
as FSK (frequency shift keying) and GFSK (Gaussian frequency shift
keying).
FM Quadrature Demodulator Block
Diagram
The conventional method of FM demodulation
for integrated circuits is Bilotti's quadrature demodulator that
uses a phase shift network and a phase detector
. Figure 1 shows the block diagram of this
quadrature demodulator. The phase detector compares the phase of
the IF signal (v1) to v2, the
signal generated by passing v1 through a phase
shift network. This phase shift network includes an LC tank (L,
Rp, and Cp) and a series reactance
(Cs). The network gives a frequency-sensitive
90° phase shift at the center frequency. The phase detector
discussed here is the bipolar double-balanced multiplier
popularized by Bilotti
. The output of the multiplier
(Io) is filtered, which results in a DC level
that changes as the input frequency changes.
Figure 1: Quadrature demodulator block diagram
Quadrature Demodulator Transfer
Function
To derive the transfer function of the
quadrature demodulator, the phase shift network is first drawn as a
small-signal circuit model (Figure 2). The impedance
(Zp) of the parallel combination of L,
Rp, and Cp is:
Figure 2: Small-signal model of the quadrature
phase-shift network
The ratio of v2 over v1 is
the ratio of impedances Zp(s) over
(Zp(s) + 1/sCs). Simplifying this
ratio,
The resonant frequency 
n of this filter is:
The quality factor Q of the phase shift network is
Rp/(nL). Next, Equation 2 is
used to solve for the transfer function from v1
to v2. The variables n and Q are
substituted into Equation 2 and
v2/v1 is written in terms of
s=j where 
n:
In Equation 4, 
is the deviation from the carrier frequency,
and 2Q/n is the normalized
deviation. Defining:
Equation 4 can be written as:
Writing v2 in terms of
v1,
Equation 7 describes the signal at one multiplier input
in terms of the signal at the other input. The signal
v1 is applied to the first input and is in
limiting (a square wave). The signal at the second input
(v2) is a linear signal. By integrating over half
of the period, you get the average value of the multiplier output
current:
For a bipolar differential amplifier, gm is
Io/VT where 2Io is
the multiplier bias current. Substituting for v2
and gm,
where V1 is the peak voltage of the signal
v1. Simplifying Equation 9 yields the
transfer function for the quadrature demodulator:
In Figure 3, the term a/(1+a²) from
Equation 10 is plotted versus the normalized frequency
deviation (a). This plot is the quadrature demodulator
s-curve. As the frequency of the signal applied to the demodulator
becomes more positive than the natural frequency of the phase shift
network, the filtered output of the multiplier increases. Likewise,
the filtered output decreases as the frequency of the input signal
decreases.
Figure 3: Plot of normalized demodulator output vs.
normalized frequency deviation
Integrated Circuit Implementation
Figure 4 shows an integrated
circuit implementation of the quadrature demodulator. The input
signal vin is supplied from a limiting amplifier
and is a square wave of known amplitude. The input signal
vin is level shifted, and v1 is
applied to transistors Q1 and
Q2. The amplitude of v1 is
large enough such that Q1 and
Q2 are switched completely on or off during each
cycle. Capacitor Cs is typically integrated while
Cp, L, and Rp are external
components. The component values are chosen such that the amplitude
of v2 is less than that of v1
as given by Equation 7. This causes transistors
Q3-Q6 to operate as linear
devices rather than switches. The output of the multiplier is
converted from a differential current to a single-ended voltage
vo. The output is filtered by components
Rf and Cf.
Figure 4: Integrated circuit implementation of the
quadrature demodulator
The authors gratefully acknowledge Mark
Randol.
