The specification, part of a continuing effort to boost the performance of the CompactPCI platform, is intended for use in high-end applications, such as telecommunications multiservice routers and gateways. It establishes the hardware capabilities for creating a fully connected mesh backplane, in which a shelf full of plug-in boards can have dedicated 2.5-Gbit links to every other board. "It brings a lot of aggregate bandwidth to the backplane," said Dick Somes of Force Computers, PICMG's technical officer.

The switched serial-interconnect approach is seen as a high-bandwidth replacement for the PCI bus. The new spec, however, allows for continued use of the CompactPCI form factor, if not the bus itself. "The CompactPCI form factor still has legs," Somes said. "It still addresses a lot of applications."

PICMG 2.20 calls for a connector change, from the conventional 2-mm hard-metric connector commonly used in CompactPCI to a so-called ZD connector. The connector change boosts performance from 622-Mbit/second frequency capabilities to 2.5 Gbits, Somes said. "The connector family we were using was not much good above 622 Mbits. We had to make the change in order to raise the performance."

Just hours after PICMG OK'd release of its spec last Tuesday, Motorola Computer Group announced the launch of the MXP3321, the first 2.20-compliant platform. The MXP3321 targets multiservice switching applications, such as multiprotocol routers, third-generation wireless radio network controllers and media gateways. Motorola said that the CompactPCI serial-mesh backplane offers telecommunications manufacturers a standard means of connecting multiple networks featuring different types of traffic, including ATM, Internet Protocol, frame relay and wireless.