LONDON — Growing use of the Amba on-chip bus from ARM Holdings plc for system-on-chip (SoC) designs has led MIPS Technologies Inc. to plan to add a direct Amba interface on its own processor cores, which will let developers create processor-neutral platforms.
The trend towards the royalty-free Amba bus was underlined by a deal announced last week between MIPS (Mountain View, Calif.) and Tality Corp. (San Jose, Calif.), a design services company which is designing a bridge from MIPS' 4K and 5K RISC processor cores to the Amba hardware bus (AHB). The bridge will open the door to use of the MIPS processors as an option on any of Tality's platform designs, where they could potentially displace an incumbent ARM processor.
"We have a standard SoC methodology and a lot of the work is with ARM. We are doing a bridge from MIPS to AHB so that we can put MIPS into any of our standard platforms," said Peter Hutton, group director of Tality's SoC design center in Livingston, Scotland.
The Scotland site of Tality, a wholly owned subsidiary of Cadence Design Systems Inc. (San Jose, Calif.), was an early partner in the ARM Technology Access Program.
"There are quite a number of customers who have used ARM in the past and we are going to make it easy for them to change," said John Hall, vice president European operations for MIPS. "It would be a logical thing to do to provide Amba. That is something that will happen."
MIPS has embarked on a campaign to sign up design houses that have developed their own IP platforms, such as Tality, to get MIPS processor cores more widely used.
Hall said his company had worked with design houses operating under contract to licensees.
"Tality was very much a partner we wanted to have," Hall said. "They have the global reach. Tality is the first where we have a direct relationship. It is a sign of things to come. We are now looking at other platform providers as a new channel. We are in negotiations with others at the moment."
Hutton said Tality is building support for MIPS processors into its platforms, kicking off with a Bluetooth design. By using AHB as a common bus, he said it would be possible to drop different processors into designs according to a customer's preference.
"We can have exactly the same platforms for each of the processors," Hutton said. "We are able to do the same with ARC [Cores Ltd.] and we have also looked at other cores such as the Leon-1."
The Leon-1 is a 32-bit RISC processor developed by the European Space Agency. Its design files can be downloaded free from the Web at www.estec.esa.nl/wsmwww/leon/leon.html. "This way our platforms become processor agnostic," said Hutton.
Chris Edwards is the editor of Electronics Times, EE Times' sister publication in the United Kingdom.
