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11 October 2008
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Feature
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Rapid Design of Media-Enabled Information Appliances
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An integration platform approach can greatly facilitate the rapid development of new products, as well as successors and derivatives. This article takes a look at the design of an information appliance that may spawn many derivatives.
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Internet Appliance Chip Design
| By Bill Murray
Information appliances have been forecasted to be among the fastest growing electronic products over the next few years. However, the term "information appliance" encompasses a wide range of devices with diverse usage models. For this article, an information appliance is any interactive information access, storage,
manipulation, and retrieval device. An information appliance may be mobile, such as a personal organizer or a handheld computer, or fixed, such as a Web phone or a home information/entertainment hub.
The vast majority of mobile information devices currently have two data sources: personal input (by stylus or keypad) and PC synchronization. International Data Corp. predicts that by the year 2002, over 60% of personal organizers and handheld computers will have direct Internet access and will enjoy an
annual unit-volume growth rate of over 250%. This implies a major increase in the number of media-enabled designs.
Moreover, the availability of low-cost mobile media and communication technologies will spawn new devices targeted at particular applications and usage models – that is, application-specific devices. Design complexity is greatly increased by the range of functionality required by these devices. Product features include video and audio processing, various wireless and wired
communications options, and the usual portable computing and personal information management functions.
This design complexity dictates the use of a structured design and verification methodology that supports the whole product lifecycle. It must enable fast first-article design for market entry, ease redesign to reduce manufacturing costs as the device gains market acceptance, and support product enhancements in order to stay ahead of the competition. Failure to implement such a structured method could
seriously undermine a company's competitiveness in this dynamic market environment.
Integration platform methodology
The integration platform is one example of such a structured methodology. It is a vehicle that enables the fast combination of multiple components and functional blocks to design a board-level system or a system-on-chip (SOC). An
integration platform is utilized to develop whole classes of designs rather than one design. Thus, a platform must possess considerable technology independence in the subsystem options that it utilizes. Moreover, the platform must facilitate an extensible system architecture that eases the design of derivative and next generation products.
Board-level integration platforms are used to integrate off-the-shelf components (both hardware and software) and subsystems to create a design for fast market entry. Board-level
platforms are modular system integration vehicles with a flexible bus architecture and hardware driver scheme. The personal media device integration platform shown in
Figure 1
was specifically developed for the design of mobile media devices.
1
It accommodates a wide range of control, computation, and signal processing engines, together with media and communication functionality and multiple user interface options. The platform is thus fully featured
in order to offer the greatest design flexibility. For any given design, unwanted functionality is simply omitted. This platform was used to design a wireless-enabled mobile media device for a client company in 97 days – from concept to working prototype (see
Figure 2
). The information appliance (IA) is used for sports officiating and other monitoring and surveillance applications.
The design objective was to obtain early prototype approval by a
number
of sports authorities. The design philosophy was to minimize custom development effort by utilizing off-the-shelf hardware and software components wherever possible, avoiding custom IC design and modifying software components wherever necessary.
Network operation
Figure 3
illustrates one of two
National Television System Committee (NTSC) video streams being fed to an Optivision NAC-3001 video encoder unit that digitizes and compresses the stream into an MPEG-1 format. The stream is channeled at 29.95 frames per second using a 10-Mbps/100-Mbps network to a 5.8-GHz wireless IEEE 802.3 Ethernet unit. It is then transmitted wirelessly to a switch situated on the sidelines, and then via one or more broadcast antennae to the handheld IA. The device stores approximately 20 minutes of MPEG video in a memory of
64 Mbytes. It can replay the video stream on demand – in real time or slow motion – as well as pan in quarter-screen increments, zoom 2x and 3x, toggle, fast forward, and rewind.
The network requires the insertion of a start-of-play (SOP) marker into the video stream at appropriate junctures in the game, for example, at the beginning of each "down" in American football, each "game" in tennis, or each "over" in cricket. This marker indicates the playback point to the IA. Currently, the SOP
marker is inserted manually using booth control software that resides in a laptop PC situated in the TV broadcast booth. Eventually, this third-party manual procedure will be replaced by a more automated procedure.
Data transfer from the video encoder unit to the handheld device is effected utilizing the unacknowledged data protocol (UDP). Multiple packets constitute a clip of five frames. Should a packet be dropped, the IA drops the entire clip. This results in a jump of approximately 0.2 seconds
in the playback.
Empirical evidence demonstrates that the incidence of such drops is so low, it is considered negligible. Before such evidence became available, however, the IA was equipped with the ability to request retransmission of dropped clips. Each packet contains frame and sequence information, enabling the device to identify the gaps. Although, this feature has been eliminated, it could easily be re-instituted for use in less favorable environments.
Hardware
Control and media data processing are executed by a 168-MHz, 64-bit RISC processor, the NEC VR4121. The processor accepts 32-bit MAC instructions, and its direct memory access (DMA) controller easily manages the Scannor's 64-Mbyte SDRAM and 4-Mbyte Flash memory. The combination of this processor and its companion graphics display controller, the VRC4171A, occupied less board area than the
alternative combinations that were considered.
The display is a 3.8-in reflective LCD display, which relies on ambient light for illumination. A version of the product has also been designed with a 3.9-in reflective display with front lighting for use in low ambient light conditions.
The data link is a 10-Mbps radio LAN module, operating in the unlicensed 5.8-GHz industrial, scientific, and medical (ISM) band. This module is a single-piece 16-bit Type II PC card and is compliant with the
IEEE 802.3 Ethernet standard . The range of approximately 1,000 square meters is adequate for sports field coverage with the appropriate local antennae. The module has 40-bit RSA-compliant encryption to prevent signal pirating – a critical issue in the high-revenue broadcast of popular sports.
The water-sensitivity of the 5.8-GHz solution is acceptable in most crowd and weather conditions. Lower water sensitivity can be obtained by using the 2.4-GHz frequency band. However, the lower 1- to 2-Mbps
data rate of IEEE 802.11 is insufficient for the 1.8 Mbps required by the MPEG video stream. Furthermore, the lack of Ethernet compliance necessitates frame transposition.
Software
A basic map of the software modules is shown in
Figure 4
. In the custom applications layer, the application loader communicates
with the server to specify which files to copy from the server to the IA and which programs to execute on the IA. The application loader also enables in-field upgrade or modification of the device's software in Flash memory, eliminating the necessity for hard reprogramming. Thus, the IA can be reprogrammed to suit multiple applications such as sports officiating, security, and surveillance.
The instant replay software reassembles the incoming signal directly in the LCD video buffer. The custom-designed
driver for the wireless module enables direct communication between the application and the network driver, thus bypassing the whole network protocol stack.
WinMgr, a basic Microsoft Windows CE version, is employed as the OS. WinMgr requires approximately 3.5 Mbytes of memory (about half the memory required by the full Windows CE version), which was reduced further by removal of such things as the GUI front-end, printing support, infrared support, and communication support.
Concerning the
custom OEM adaptation layer (OAL) or hardware adaptation layer (HAL), the OAL interfaces the OS kernel with the microprocessor. The OAL provides CPU initialization, interrupt enable/
disable and routines, and interval timer and real-time clock. The kernel functionality supports multiple CPU types, while the OAL (with its attendant hardware drivers) is CPU-specific and must be developed. In this case, the VR4121 OAL was developed by modifying an off-the-shelf VR4111 OAL.
The driver for the wireless
network interface card (NIC) was developed by modifying an existing Windows NT miniport driver for the NIC. This was relatively straightforward, because Windows NT drivers and Windows CE Network Driver Interface Specification (NDIS) drivers are largely compatible. The PCMCIA driver is a 16-bit modification of the original 8-bit off-the-shelf component. The LCD driver was developed from scratch.
Device power consumption
The intermittent use, as opposed to the continuous viewing, of the IA results in a 3-hour mean operating time between battery change/recharge. This is adequate for most sports events, although test cricket lasts several days, necessitating battery changes at tea time.
Lifecycle management
The return on investment of consumer devices depends upon the design's amenability to cost reduction, functionality enhancement, and their application to additional usage models. The IA was designed with this in mind.
The VR4121's DMA manages up to 128 Mbytes of synchronous DRAM and 64 Mbytes of Flash memory. Thus, it can support design derivatives with major application and functionality extensions. The MIPS architecture has the advantage of multisource availability of
MIPS cores that may be embedded in an SOC for system shrink and cost reduction. (See
Internet Appliance Chip Design sidebar
.)
The choice of the wireless NIC PC card module is critical to the appliance's size and the reduction of manufacturing costs. The IC components used in the module are available separately, and the HDL descriptions are available for use in SOC designs. This choice, therefore, supports both custom board implementation and IC
integration.
The application loader enables the download of software applications that transform the application from, among other things, sports officiating to security and surveillance.
The application software is able to create a Windows bitmap for display by the Windows CE graphical display interface. Although not utilized in the IA, this facility enables the application software to run on Win32-based applications and on other hardware. Such flexibility and hardware-independence facilitates product
evolution and supports other monitoring and surveillance devices.
The IA is equipped with both Windows Sockets (Winsock) and the network protocol stack. Although not used in the appliance, this facility also supports the product's evolution. For instance, Winsock can read a video stream from an IP multicast and read and execute control commands, using a standard TCP/IP socket.
Creating derivatives
The IA design is not only an application-specific mobile media device; it is also a reference design for a whole range of similar devices that can be derived from the product's basic architecture. The client is formulating product plans to take the IA and its derivatives into multiple consumer, security and monitoring applications. Many of these derivatives will only require application software changes. Some of the modifications may require hardware
changes such as radio communications with increased range. These changes can now be quickly made and verified with the integration platform.
In the absence of information appliance standards, multiple architectures will battle to become the industry standard equivalent of Wintel in the PC world. Integration platforms afford designers flexible design and verification vehicles to develop the multifarious product architectures that will be demanded of them.
Bill Murray
is
group director for design services at Cadence Design Systems, Inc. He holds a BSc in applied physics from the University of Sussex, UK and an MSc in applied solid state physics from Brighton Polytechnic, UK. He can be reached at
bmurray@cadence.com
.
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