RF Design Verification
Hardware performance characterization early in the design cycle is
preferable, and can begin before modem software is available. Projects
saddled with repetitive prototype testing are instances where RF design
verification and test automation are important.
By Brian Senese
RF hardware performance is critical when designing communication systems
that rely on digital signal processing for the demodulation of
information-bearing signals. Hardware performance characterization early in
the design cycle is preferable, and can begin before modem software is
available. Projects saddled with repetitive prototype testing, followed by
preproduction batch measurement, are instances where RF design verification
and test automation are important. Ideally, test procedures should be
developed independently from the design effort, and are best executed by a
nonpartisan resource, which is a machine when automated. In contrast with
manual
testing, automation eliminates boredom, and enhances test accuracy.
It also encourages timely results, which can hasten projects defined by
aggressive deadlines.
Handset receiver
The receiver depicted in
Figure 1a
is modeled after a Global System for Mobile
Communications (GSM) handset and consists of an amplification chain and
signal sources section containing all local oscillators. Signal sources
provide the signal base used in the
downconversion process. The digital
signal processor (DSP) then demodulates the resulting baseband information.
Three stages of filtering are critical for the reduction of noise, and are
a necessary step for the improvement of receiver performance. First, the
front-end filter attenuates RF energy outside of the RF-receive band that
extends from 935 MHz to 960 MHz. Next, at an intermediate frequency (IF) of
71 MHz, the IF filter attenuates unwanted frequency components generated
during the initial
downconversion. Finally, the desired signal is further
filtered using a passband filter with a bandwidth of 400 kHz. At baseband,
and resident within the DSP, a finite impulse response (FIR) digital filter
with a bandwidth of 200 kHz is implemented (prior to attempting
demodulation).
Receiver operation is managed using two control parameters: the tuned
frequency of the agile local oscillator (LO), and the receiver gain level
as adjusted by the automatic gain control (AGC) circuitry. By setting the
agile LO to an
appropriate frequency, say 1,011 MHz, energy within the
chosen channel (f
0
= 940 MHz) is amplified first before being
downconverted, centered at 71 MHz. The IF section amplifies the signal in
accordance with the programmed gain. The filter then attenuates all
downconverted energy falling outside of its 400 kHz bandwidth. The second
downconversion stage brings all signal energy to baseband, and separates
quadrature bit streams for digitization by an analog-to-digital (A/D)
converter. The
remaining discussion assumes this model.
Sensitivity
Receiver sensitivity is a term used to describe the minimum signal level
that the system can successfully demodulate. Sensitivity levels for mobile
cellular equipment are typically in the area of -104 dBm. Factors governing
receiver performance are numerous and include:
- Receiver gain
- Front-end amplifier performance
- LO noise
- DC offset as presented to the A/D converter.
Receiver gain must be
adequate, and requires that one be cognizant of
baseband response. One must also be aware of the A/D converter dynamic
range and input signal swing while RF signals are at the sensitivity level.
Dynamic range, which is governed primarily by the AGC, must be capable of
handling a wide range of RF signal strengths, presenting the A/D converter
with adequate signal levels. These levels should be large enough to use at
least one half of the range made available by the device.
A source of
internally generated
noise can be traced to the first RF amplifier. Poorly
selected components with high noise figures degrade performance by burying
low-energy signals in the noise that they themselves create.
The sources section, especially the agile LO responsible for tuning to the
frequency of interest, suffers from inherent 1/f noise and can generate
unwanted frequency components. Dirty power supply lines running into the
sources section can accentuate phase noise as well. Further, the
voltage-to-frequency relationship of
the voltage-controlled oscillator
(VCO), as shown in
Figure 1b,
has a typical S-shaped curve. Fringe
frequencies tend to be susceptible to noise. Temperature serves to shift
this curve either to the left or to the right, placing the non-linear
portion of the curve at a voltage/frequency point. This position offers
very little control over frequency as a function of input voltage. This is
shown where V
1
moves to V
2
in
Figure 1b.
Phase noise and frequency stability are also associated with the integrity
of the power source. A noisy or varying power source can increase phase
noise and can also pull the generated frequency, resulting in a slight
detuning of the receiver, which in turn degrades sensitivity.
The second
downconversion process, separating the I and Q channels, can introduce DC
offset and affect the A/D conversion. Component mismatches can negatively
impact the demodulation capability of the DSP. ASICs are often used for
downconversion, eliminating problems with unbalanced or mismatched
components, which cause differences in baseband signal output (such as the
I signal being larger than the Q signal).
Many factors can potentially degrade receiver sensitivity. External
effects, such as temperature and input voltage variations, can aggravate
the situation. However, sensitivity can be measured early in the design
cycle to provide an early warning in
cases of receiver design deficiency.
Receiver sensitivity is defined as the minimal amount of desired signal
energy that can be adequately demodulated. For instance, a specification
may indicate that at -104 dBm, the receiver shall not experience more than
5%-bit error rate (BER). Verification is straightforward — transmit a
known bit sequence to the receiver, demodulate the transmitted bit stream,
then compare the demodulated version with the transmitted sequence. When
software is unavailable to
support this model, a secondary method can be
used to estimate system performance.
A signal-to-noise (S/N) ratio
measurement at baseband can be taken while presenting the receiver with a
signal at sensitivity. If the resulting ratio exceeds that specified by
theory for a given bit error rate, the hardware is considered
satisfactory.
Figure 2a
depicts the information required to calculate
a carrier to noise (C/N) figure (used as an estimate
for S/N ratio), and is
based upon the double-sided spectral response at baseband. Two distinct
signals make up this response: noise (N), which is characterized by a hump
centered at 0 Hz, and the continuous wave (CW) stimulus at f
0
+
150 kHz. Noise is band-limited by the IF filter and is amplified in the
receive chain. CW is presented to the receiver front end, offset from the
tuned frequency by 150 kHz, and at sensitivity. CW enjoys the benefits of
amplification, yet falls outside of the 200-kHz
bandwidth, which is
eventually imposed upon the signal by the DSP. Noise power within the
200-kHz bandwidth can be delineated by markers provided by the vector
signal analyzer (VSA). By measuring the total baseband noise power and the
power of the CW reference, a C/N figure can be determined.
Figure 2b
illustrates the theoretical probability of error for a Gaussian minimum
shift keyed (GMSK) signal, with which the measured C/N is now compared.
From this graph, a BER of 5% requires that a S/N ratio of at least 7 dB be
presented to the A/D converter from the I and Q channels.
Figure 2c
illustrates the setup used to measure receiver sensitivity. All connections
are made to the necessary test equipment via an IEEE 488 bus for automated
control. Because this is prototype hardware, a means of target control is
required. In the setup shown here, the receiver center frequency and gain
are
set using special test harness software running on an independent
computer. The use of a “translator” provides a control interface
between the main computer and the computer configuring the target hardware.
The translator converts data from a serial port into data that will be
accepted by a keyboard input port.
This test configuration is fully
controllable and easily automated. Using it, the previously mentioned
temperature and voltage effects on RF hardware performance can be measured.
Deviation in performance can also be noticed over frequency.
Blocking
Blocking performance of a receiver is a measure of its ability to retain
sensitivity while rejecting strong interference. Spectral components in the
environment, such as adjacent channel activity, are not solely responsible
for desensitizing the receiver. Internal frequency components are equally
to blame for accentuating noise power in the baseband.
A primary
mechanism through which extraneous signal energy is transferred
into the
baseband is the signal mixing process. Although filters are in place to
remove unwanted signal energy, trace amounts of energy still exist and end
up being presented to the mixer, either from the sources section or the RF
path. Com- binations of signals can very easily mix and generate unwanted
frequency components that eventually make their way as noise into the
baseband.
Receiver selectivity, or in-band blocking, is one cause of
baseband noise. Receiver selectivity deals primarily with mixing
internal
frequency byproducts, originating within the sources section, with very
strong external RF signals, which fall within the range of frequencies
serviced by the receiver. Receiver spurious response (or out-of-band
blocking) measures receiver performance when the receiver is bombarded with
signal energy outside of the receive band. Receiver spurious response is
another cause of baseband noise.
In-band interference is mainly attributable to LO performance.
Figure 3a
illustrates the single-sided spectrum of a typical LO. A secondary
frequency component offset by 200 kHz can exist. This secondary frequency
component is the result of the input comparator frequency signal leaking
through the comparator (see
Figure 1a
). This 200-kHz signal is used by the
comparator to generate an error voltage to be filtered and used to control
the VCO. The loop filter tends to reduce this component
if the bandwidth is
sufficiently small. On the other hand, reducing loop bandwidth can inhibit
or significantly degrade lock acquisition time. Assuming that a 200-kHz
component is present, this component can mix with incoming RF signal energy
above and below the tuned center frequency ( f
0
), introducing
interference in the baseband.
A different measure of performance is that of spurious response, or the
receiver’s ability to manage frequency components outside of the RF
receive
bandwidth. The agile LO often has harmonic components (2nd, 3rd,
4th harmonics of the fundamental) associated with it, which are strong
enough to generate byproducts by way of the mixing process. LO harmonic
components can easily mix with incoming RF energy. For example, if the
agile LO is tuned to 1,011 MHz, the 3rd harmonic of the agile LO may appear
at 3,033 MHz at a level of 65 dBc with reference to the fundamental.
Introduce this frequency to an RF signal at 0 dBm positioned outside of the
receive band at
2,962 MHz, and interference problems result. Although
attenuated significantly by the RF filter, some interfering energy still
makes it to the mixer. The mixed byproduct of both LO and RF signals
appears at IF, passes through the IF filter, and is amplified greatly,
thereby degrading receiver performance. Many other spectral components
appearing with the LO, such as the 13-MHz reference, can increase the
number of interfering frequencies to which the receiver is sensitive.
A concern unrelated to internally
generated frequencies is that of image
frequencies in the RF. The image refers to a frequency that appears on the
other side of the agile LO. For example, if the receiver is tuned to 940
MHz, the agile LO will be centered at (940 + 71) MHz. The image resides at
([940+71]+71) MHz, and when downconverted within the receiver, generates an
IF of 71 MHz, introducing interference. Because these factors can
desensitize the receiver, comprehensive test coverage is a very important
activity.
Blocking performance
can be assessed by measuring receiver
sensitivity while applying interference to the receiver’s front end.
Degradation in C/N at specific interfering frequencies is an early warning
that receiver blocking performance may be a problem. This is not
necessarily cause for alarm. In the land of GSM handset testing, blocking
is recognized as a difficult test to pass. Hence, a limited number of
blocking requirement failures are tolerated.
Figure 3b
depicts a practical test setup and adds two frequency generators to the
common test setup of
Figure 2c.
One generator provides the CW reference
required to determine carrier power. The other generator provides a source
of strong interference, and is preferably a frequency synthesizer, since
this type of equipment typically has very good noise performance. In-band
testing can be done by setting the frequency synthesizer to selected
interfering frequencies that are likely to cause problems in the baseband.
Out-of-band measurements are somewhat tougher, since the test equipment can
cause erroneous readings. Interfer- ence power can be as high as 0 dBm. At
such high power levels, the noise floor from the interference generator can
be relatively high as well, possibly trailing off to a steady -120 dBm.
This sideband noise (as shown in
Figure 3c
) can
be amplified by the receiver and
downconverted to baseband, effectively
increasing N. One way to prevent this problem is to insert a narrowband
notch filter tuned to the center frequency (f
0
) between
interference and combiner, to remove the noise component.
Intermodulation
Intermodulation distortion comes in several forms. For narrowband
communication systems, the most important type is called the 3rd order
intermodulation product. Two strong frequency components can mix within the
front end low-noise amplifier
(LNA), generating unwanted frequency
components that are then downconverted to baseband. Rejection of
intermodulation products is a measure of LNA performance. The difference
between the level of receiver sensitivity (-104 dBm) and interference
signal strength where the intermodulation is beginning to degrade system
performance, represents, in dB, a measure of intermodulation rejection.
Figure 4a
depicts two strong signals, (f
1
and f
2
), which
produce two additional components, (2f
2
+f
1
and
2f
1
+f
2
), when combined within the receiver LNA . If
the newly-created frequencies were to fall within the tuned center
frequency of the receiver, they would be downconverted to baseband,
increasing the noise components. This additional noise would ultimately
degrade system performance.
Typically, signal strengths of the interfering signals are presented to the
receiver at -50 dBm, with the
desired reference signal set at sensitivity
(or slightly above). Sensitivity measurements can be taken while applying
interference at frequencies conducive to generating an intermodulation
product at the receiver’s tuned frequency (i.e., one signal is at
f
0
+200 kHz, the second is at f
0
+400 kHz).
Figure 4b
shows the test set- up for this measurement.
Automate the works
Automation of these and many other types
of tests can be painless, and the
payback is substantial when large numbers of repetitive tests are executed.
System integration is a prime candidate for automation, since RF tests have
to be run several times before results are conclusive when performance does
not meet specification. When regression-testing new hardware and
batch-testing preproduction units, automation is also useful. Once software
is made available on the target, the test system can be modified to use
this additional demodulation
capability.
There are factors to consider when developing an automated test system.
Care in designing test duration is important, as test execution time can
balloon (given that mechanics of automation is trivial when compared to
test case design). One may become engrossed in automated test development,
only to find that after running through all frequencies, temperatures, and
voltages, a particular test would take days to complete. As a direct result
of the many support tools available such as HPVee, Labview,
and
LabWindows, it is easy to develop automated routines. Automation hardware
is readily available, because IEEE 488 instrument control is commonplace.
One tip worth mentioning: if the test equipment you are using comes with
preset capability, use it. Complex instruments are best set up by calling
presets that can be created outside of test automation, then stored in
instrument memory. Instructing the instrument to recall the desired
configuration is far easier than configuring the equipment during test
execution.
There are instances when the 488 bus can not be used. Digital I/O, serial
I/O, PC control, workstation control, or any proprietary interface running
a protocol are some examples. Surprisingly, lesser-known companies tend to
have unique products, such as the product used in this tester (the
serial-to-keyboard converter). Skepticism should be kept at bay when
integrating such components, as they work well and make complex test
systems possible.
Once the system is assembled and test algorithms
have
been developed, calibrating the system to ensure measurements are made
accurately becomes critical. Typically, leaving areas in the automation
program that allow the user to enter calibration factors, (such as cable
loss or device insertion loss or gain), is recommended, as doing so
provides two benefits. First, program development does not have to remain
incomplete until calibration data is known. Second, calibration data does
change over time as the result of replacing a component in the setup.
Completing the test system allows test execution to take place 24 hours
per day. Such large amounts of unattended testing requires that results be
recorded and stored. Again, the test software supports a variety of storage
formats — from placing data into a text file to writing it into Excel
or a database. Placing raw data (with pass or fail verdict) into a
spreadsheet may be preferable, since data can be graphed easily. In this
format, performance trends can be identified, and sensitive areas where
performance margins are small can be easily detected.
When tests fail, it is convenient to conclude that the unit is deficient,
sending the design team off into debug heaven. Before declaring hardware
failure though, make sure that the environment is not to blame. Development
labs are predisposed to spectral pollution, as stray, intermittent RF
energy can be generated from any number of sources. With the current
cellular or PCS bands, signals abound. A shielded room goes a long way
toward preventing such
problems, and can be as small as a child’s
metal lunch box (properly grounded).
Resistance is futile
Hardware verification is best accomplished by an independent test engineer
with a strong background in RF. It can also be worthwhile to invest in
automation. There is no doubt that manual hardware testing can be
interesting and educational the first time around. However, repeating the
same test 500 times quickly degrades into mind-numbing, torturous labor
(what one might consider a form of
penance). It is unnecessary to endure
this type of tedium. Test systems can be developed quickly, paying for
themselves many times over by conserving rare engineering resources,
increasing test coverage, running test scenarios around the clock, and
uncovering hard-to-detect hardware deficiencies early in the design
cycle.
Brian Senese has contributed towards the development of several wireless
communications systems and has worked for companies such as Nortel, Lucent
Technologies, PCSI, Uniden,
and, most recently, ADC Telecommunications. He
has a masters degree from the University of Western Ontario and can be
reached at
bpsdsp@incom.net.
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