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11 October 2008

Top Ten

Silicon-Based IP Routing

By Ram Krishnan and Emil Chao

The Internet is sure to be considered one of the twentieth century’s greatest technological achievements. The Internet now provides access to news, special interest groups/clubs, shopping, dating, investing, banking, and entertainment. Over the next few years, as Internet services evolve, it is widely expected that videoconferencing, telephony, and other such real-time applications will also be delivered over the Internet infrastructure.

These expectations will never be realized without upgrades to existing routing equipment. Today’s routers are based on old architectures that were designed to solve the problems of bridging and switching data packets in multiprotocol environments. To that end, highly programmable routers were desirable, and thus it was logical for router implementations to be heavily software based. In any technology, high programmability is almost always traded off for increased cost, decreased performance, or both. Traditional routers were designed for routing data packets in low WAN traffic and high LAN traffic environments, so programmability was wisely provided while sacrificing both low deterministic latency and wire-speed (line-rate) packet processing. However, next-generation Internet entertainment and communication services can’t afford to have high, non-deterministic latency (for routing voice and video packets) or slower than wire-speed packet processing (for enabling quality of service).

To support the continued evolution of the Internet, dedicated protocol hardware routing, which will provide significantly higher performance at the expense of supporting multiple link layer (Layer 2) protocols, is required. Here are ten reasons why silicon-based IP routing is the way to accomplish this goal.

  1. The popularity of IP. The pervasiveness and far-reaching impact of the Internet has made the IP the dominant protocol in networking. Only IP packets traverse the Internet, so routers that support the Internet infrastructure, except at the outer edges, never encounter other protocols. The Gartner Group and Dataquest estimate that by 2002, less than 15% of all networks will be using protocols other than IP. This indicates that a high-performance router specifically optimized for routing IP packets will benefit the majority of the world’s networks. Additionally, IP is well understood and stable, and unless the Internet is overhauled, will remain the dominant protocol. New forms of IP, such as IPv6 are designed to be compatible with the current version, IPv4.

  2. Low latency. Latency is the delay between the time that a packet enters a router and the time it exits the proper network interface. Currently, latencies of high-end software-based routers are in the 10-ms range, whereas hardware-based routers can achieve latencies of as little as 10 µs. Applications such as Internet telephony, videoconferencing, and gaming require deterministic low latencies. For instance, in Internet telephony, a voice packet would accumulate approximately 100 ms of delay after traversing only ten software routers, drastically reducing the distance range of phone calls. Hardware-based routers would be able to extend that range a thousand-fold.

  3. Wire-speed operation. Low latency is necessary to support future Internet services, but it is not sufficient. When a router receives any packet, it must classify it and decide upon appropriate action: to drop the packet or to schedule it for transmission out of the proper network interface. Routers must perform these tasks at wire speed in order to guarantee QoS, — it must support latency-sensitive traffic. Dedicated protocol hardware-routing silicon can operate at wire speed with relative ease, though this be comes extremely difficult for the algorithms used in software routers as line rates increase (516 ns per packet for OC-12 links and 130 ns for OC-48 links).

  4. Wire-speed packet filtering. The fate of any packet can be policy driven. Details of every packet must be examined, such as source and destination IP addresses, source and destination Layer 4 ports, type of service, and type of protocol (UDP versus TCP). Based upon these details, a packet may be dropped or scheduled for egress from an output port. At less than wire speed, routers can become overwhelmed under heavy traffic conditions, and no longer be able to deliver QoS performance.

  5. Wire-speed bandwidth shaping. Sometimes, there are multiple physical links between two points in a network. These links may be of different link rates. If so, depending upon the type of service, packets can be scheduled to the appropriate physical link. For instance, data packets may be routed through the slower links, whereas packets containing video information are sent over the faster ones. For multiple same-speed links, the router may distribute the packet traffic evenly across the links to enhance throughput.

  6. Traffic management. Under extremely heavy traffic conditions, all routers reach a point where they can’t route every packet they receive. A router must then decide which packets to route and which to drop (dropped packets get retransmitted from the source at a later time). Of course, it is preferable to not drop mission-critical packets, so the router must classify each and every packet and act accordingly. Next-generation routers must be able to do so at wire speed because at slower rates, the router will begin to drop packets before classifying them.

  7. Industrial-strength reliability. Hardware routers are capable of performing the routing tasks at wire speed, so they are not susceptible to crashing under heavy network traffic. This makes them good candidates to serve as firewalls and gateways, where reliability is extremely important.

  8. Scaleability. Current software routers depend on a mix of FPGAs, gate arrays, and processors to execute code. This type of architecture prevents the use of customized circuit-design techniques made possible by the advancement of semiconductor fabrication technology. Silicon-based IP routers, however, take advantage of these techniques to implement routing functions in a few clock cycles, whereas in software implementations, the same functions require many clock cycles to execute algorithms and communicate between the many FPGAs, gate arrays, and processors in the system. Ease of scaleability to greater port counts and higher-speed links are characteristic of silicon-based IP routing solutions.

  9. Compactness. The use of silicon-based IP engines to carry out the basic routing functions drastically reduces the number of components required to implement a router system. This translates directly to lower power dissipation and smaller area. The high level of silicon integration allows for a dramatic increase in the number of logical and virtual connections per inch of rack space. With Internet connectivity doubling every 6 months, service providers are seeking to leverage rack space and have a clear migration path to high-density networks (Source: US Department of Commerce, 1998).

  10. Fast system-design cycle time. The introduction of silicon-based IP routing allows existing OEMs to achieve aggressive time-to-market schedules by providing system designers with standard silicon to carry out basic routing functions at a high performance level. The OEMs can then focus resources on higher-layer system-design challenges. These standard silicon devices, accompanied by APIs and drivers, can easily be integrated into existing router architectures and preserve prior investments in higher-layer code without requiring the use of specialized development platforms and new compilers. Access to routing silicon has been one of the primary barriers to entry into the routing systems market, and its availability will enable the routing industry to provide new and revolutionary solutions.

Ram Krishnan is chief technology officer and a cofounder of Entridia. He holds a BS in computer science from National University. He can be reached at rkris@entridia.com .

Emil Chao is chief operating officer and is also a cofounder of Entridia. He holds an MSEE from the University of California at Irvine. He can be reached at chao@entridia.com .



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