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07 October 2008

CSD 2019: Turbo Product Codes

By Bill Thomson
A new class of correction codes has been developed that is a major improvement over current error correction coding (ECC) solutions, with performance approaching the theoretical limit for any error correction code. These codes are called turbo codes, and have been implemented in both software and hardware.

High-speed digital communication systems development demands the optimization of various requirements: data transmission rate, data reliability, transmission energy, bandwidth, system complexity, and cost. ECC helps meet these require- ments cost-effectively. The higher the error correction code performance, the more flexibility the designer has to determine the required transmission energy, bandwidth, and system complexity.

Common codes
Signal-to-noise ratio (SNR) improvement of a communications channel depends on the error correction code used and the channel’s characteristics. In 1948, Claude Shannon derived the bound on the error correction performance for all possible codes. Unfortunately, his theorem only proves the existence of codes with this performance. It does not supply a method for constructing a good code. This limit on ECC performance has been termed the Shannon limit.

Reed-Solomon (RS) and concatenated Reed-Solomon Viterbi (RSV) are the most common error correction codes implemented today. At a bit error rate (BER) of 10 -6 , both code types are at least 2.5 dB to 3.0 dB short of the Shannon limit in an additive white Gaussian noise (AWGN) channel.

One step forward
Turbo codes represent the next leap forward in error correction. They have been shown to perform within 1 dB of the Shannon limit at a BER of 10 -6 . Turbo codes break a complex decoding problem down into simple steps, where each step is repeated until a solution is reached. The term “turbo code” is often used to refer to turbo convolutional codes (TCCs) — one form of turbo code. The complexity of convolutional codes has slowed the development of low-cost TCC decoders. On the other hand, another type of turbo code, known as turbo product code (TPC), uses block codes, solving multiple steps simultaneously, thereby achieving high data throughput in hardware. TPCs have been implemented in both software and hardware as a single integrated circuit. TPCs do not suffer from the error floor at low BERs that have been attributed to other codes. TPCs are also capable of providing high coding gain, even with high code rates.

Turbo product codes provide 1.5- to 3-dB bit energy-to-noise improvement over the current standard RS and RSV error correction codes. A 1.5- to 3-dB performance gain can allow the system developer to reduce transmitter power and/or bandwidth and still maintain the same BER performance. Conversely, a 1.5- to 3-dB improvement can be used to boost the overall system performance if transmitter power is not reduced. For example, the use of TPCs can allow the systems engineer to reduce antenna size, lowering system cost. When used to provide improved BER performance, TPCs can also lead to a clearer image transmission, improv- ed audio, greater range, or better data integrity. (For more information on TPCs, go to www.aha.com or www.eccincorp.com.)

Noisy channels
TPCs are applicable where digital data is transmitted over a noisy channel, or when data is stored on an imperfect medium. TPCs can support the data rates achieved with other error correction codes, while offering improved correction capability. They can be used with high-definition TV, digital cellular communications, satellite communication systems, optical and magnetic storage, and microwave point-to-point data links.

TPCs are moving the practical performance of ECC a major step closer to the Shannon limit. Current integrated circuit technology and improved algorithms are making these codes cost-effective for today’s system designs. As with RS and RSV codes, TPCs will soon find their way into many areas of wired and wireless communications and data storage.

Bill Thomson is a senior applications engineer at Advanced Hardware Architectures, Inc. He holds an MSEE from Washington State University. He can be reached at bthomson@aha.com.




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