Power amplifiers (PA) are one of the most expensive and most power-consuming components in 3G base station architectures. They are inherently nonlinear, and when operated near saturation, cause intermodulation products that interfere with adjacent and alternate channels. This interference affects the adjacent channel leakage ratio (ACLR) and its level is strictly limited by FCC and ETSI regulations.
Fortunately, there are linearization techniques that allow PAs to operate efficiently and at the same time maintain acceptable ACLR levels. In effect, linearization affords the use of a lower-cost more-efficient PA in place of a higher-cost less-efficient PA.
PAs in the field today are predominately linearized by some form of feed-forward technology, a conceptoriginally proposed by Black during the 1930s.1 In recent years, however, designers have started to veer away from traditional feed-forward approaches toward linearization techniques that employ digital predistortion. Compared to feed-forward architectures, designs based on digital predistortion
approaches are showing higher efficiency at lower cost and, with recent advances in technology, digital predistortion can now support signal bandwidths in excess of 20 MHz.
In this paper, we use digital predistortion to linearize a laboratory PA. The transmit waveform is four carriers of UMTS comprising a 20 MHz signal bandwidth. An adaptive algorithm is used with a closed-loop hardware architecture to improve ACLR by 15 dB, meeting the 3GPP specification with 12% efficiency. It is also shown that the PA phase nonlinearity is a large contributor to ACLR and cannot be neglected.
Linearization 101
To understand the basic concepts of linearization, let's examine a power amp that can be modeled using memoryless nonlinearity. Figure 1 shows the input-output block diagram of a power amplifier where νi(t) and νo(t) are the input and output signals respectively.
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Figure 1: Block diagram of power amplifier input and output.
In this example, the output of the complex baseband model can be expressed as:
where 
and 
are the amplifier's amplitude and phase transfer characteristics — commonly
referred to as AM-to-AM and AM-to-PM characteristics.
The transfer characteristics can be measured by applying an input pulse to the PA and measuring the output amplitude and phase. The amplitude and phase values can be plotted as a function of input power as shown in Figures 2(a) and 2(b).
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Figure 2(a): Diagram of AM-AM characteristic.
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Figure 2(b): Diagram showing AM-PM characteristic.
The PA characteristic curves shown in Figures 2(a) and 2(b) are typical of actual AM-AM and AM-PM measurements, but this data was generated from the polynomial model defined by:
where G corresponds to a gain of 35 dB and:
The amplifier's linear characteristic is defined by:
The linear region is defined as that set of inputs for which 
and 
. From the data in Figure 2, the upper limit of the linear region falls between +5 and +10 dBm. From the linear region of Figure 2(a) it is evident that the amplifier exhibits a 35-dB gain. At higher input power levels, the amplifier cannot sustain this gain.
The 1-dB compression point is defined as the input power at which the amplifier's output power is 1 dB below the linear response. In the example highlighted in Figure 2, the 1-dB compression point occurs at +20 dBm. With the input power at +20 dBm, the output power is +54 dBm, which is 1 dB less than the +55-dBm output power required for linear operation. The saturation point corresponds to the input level that results in the largest output. In this case, the saturation point is at +25 dBm.
A predistortor preceding the amplifier can be used to linearize the amplifier. Figure 3 shows the predistortion PA cascade where νd(t) is the predistortion output.
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Figure 3: Diagram of a cascaded digital preditorter/power amplifier setup.
Expanding Equation (1) gives the PA output expression:
Clearly, the PA is linearized when:
For input levels in the linear range of the amplifier, the predistortor applies a gain of 0 dB and has no effect on the signal. In the nonlinear range, the predistortor applies a gain to either amplify or attenuate the input signal. The value of the gain depends on the input level. For example with an input of +20 dBm, the predistortor applies a gain of approximately 2 dB. The amplifier input is now +22 dBm, which results in the desired +55-dBm output.
Although sometimes overlooked, the predistortor must also linearize the amplifier's phase response. Figure 2(b) shows that the phase distortion is approximately 2 deg. at the 1-dB compression point, and nearly 6 deg. at saturation. The predistortor introduces a phase shift that is equal and opposite to that of the amplifier. The two-tone analysis that follows gives clear evidence that phase linearization cannot be neglected.
PAs can be characterized by their response to inputs constructed from two sinusoidal tones. Consider the
two-tone input shown in equation 7.
The input can be expressed using a trigonometric identity as:
where:
In this form, the two-tone input is clearly equivalent to amplitude modulation with a tone and exhibits a peak-to-average ratio (PAR) of 3 dB.
It is evident from Equation (1) that the PA output is the product of three terms: (1) 
; (2) 
; and (3) 
. It follows that the spectrum of the output is equal to the spectral convolution of these three terms.
Figure 4(a) shows the spectrum of the two-tone input signal defined by Equation 8 where ω1=5 MHz and ω2=9 MHz. In this case, the input signal has average power of +17 dBm and a peak power of +20 dBm. Given this two-tone input for νi(t), the amplifier's amplitude and phase responses for items (1) and (2) in the paragraph above are given in Figures 4(b) and 4(c) respectively. The amplitude response is simply double sideband tone modulation.
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Figure 4(a): Spectrum of two-tone input ().
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Figure 4(b): Spectrum of PA amplitude component .
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Figure 4(c): Spectrum of PA phase component .
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Figure 4(d): Spectrum of PA output .
The phase response of the examples in Figure 4 can be expressed as a Taylor's series:
to write:
where:
and
It is evident from Equations 10 to 13 that the phase response has an infinite number of spectral components, but the amplitude of these components falls off rapidly as shown in Figure 4(c). The amplifier's output, shown in Figure 4(d), is equal to the convolution of the input spectrum in Figure 4(a) with the amplitude and phase spectra shown in Figures 4(b) and 4(c) respectively.
In the above two-tone example, where the PAR was 3 dB, the average power of the two-tone signal was +17 dBm and the peak was +20 dBm. Thus, in this example, the average power was backed off by 3 dB so that the peak power did not exceed the 1-dB compression point of the amplifier. Multicarrier communication signals can exceed 9-dB PAR and therefore require greater backoff. Unfortunately, as backoff increases efficiency decreases.
Figure 5 shows that the efficiency of class A, AB, and B amplifiers falls off rapidly as backoff increases. This data is constructed using the analysis given in RF Power Amplifiers for Wireless Communication2 for a PA governed by an ideal strong nonlinearity in transconductance.
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Figure 5: When an amplifier requires greater backoff, efficiency will decrease.
For an ideal strong nonlinearity, the minimum backoff required for linear operation is equal to the PAR. If we consider a more realistic model that includes a weak nonlinearity, then the backoff needs to be increased even further. Digital predistortion can be used to linearize the weak nonlinear behavior of the amplifier and reduce backoff, thereby increasing efficiency.
The efficiency benefits can be dramatic. For example, if the efficiency improves from 9 to 12 percent for a 10-W amplifier, the dissipated power is reduced from 101 to 73 W.
Laboratory results
To provide a real-world flare the predistortion discussion from above, we ran some tests in a laboratory setting (Figure 6). In this laboratory test, both the forward and feedback paths employed direct RF conversion.
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Figure 6: Diagram depicting the laboratory setup.
A quad-programmable converter evaluation board was used in a polyphase mode to generate a four-carrier UMTS digital waveform with 8-dB PAR. This waveform was predistorted using a predistortion linearizer evaluation board. The linearizer board is a baseband lookup-table (LUT) predistortion part that is clocked at 125 MHz and delivers a full 100 MHz processing bandwidth.
An on-chip clock divider provided a 62.5 MHz clock to drive the programmable converter. On-chip interpolating filters were also used to upsample the converter output to the 125 MHz rate.
The preditortion linearizer also includes programmable fast impulse response (FIR) filters, which were used to equalize sin(x)/x A distortion and frequency response imbalance between quadrature paths—in particular group delay mismatch.
During the tests, we used the predistortion linearizer's gain, phase, and offset correction to improve the image rejection and carrier leakage of the direct upconverter.3. The linearizer evaluation board includes a dual DAC and interfaces to an upconverter in order to generate the 2.14 GHz predistored RF waveform. The output of the PA was downconverted and fed back to the linearizer through a dual 10-bit ADC evaluation board running at 125 MHz. The input and feedback waveforms were captured using the linearizer's input- and feedback-capture memories.
The predistortion linearizer evaluation board includes a Matlab interface library, which was used to develop an adaptive algorithm to process the input- and feedback-capture data and update the linearizers LUT. The algorithm was based on a variation of that presented in Adaptive Linearization Using Predistortion&$151;Experimental Results.4.
Figure 7 shows the AM-AM and AM-PM characteristics of the LUT after the algorithm converged. The upper region of the curve is flat because that region was beyond the peak level of the input waveform and was not updated by the algorithm. The AM-AM characteristic shows a gain expansion of around 0.9 dB, while the AM-PM characteristic shows a large phase adjustment of up to 13 degrees. This data suggests that phase correction is just as important as amplitude correction for linearizing this PA.
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Figure 7: Digital predistortion amplitude and phase characteristics. (Note: the left figure represents AM-AM characteristics while the right figure represents AM-PM characteristics)
Figure 8 shows the PA output with and without predistortion. This data was collected using the ZFL25000VH amplifier from Mini-Circuits. In this case, ACLR is improved by 15 dB for a 20 MHz signal bandwidth. It was observed that as the signal bandwidth is reduced, ACLR improvement climbs to 25 dB or more.
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Figure 8:PA output without predistortion.
Similar results were measured using a high-power LDMOS PA operating at 36-W average output power with an efficiency of 12%. Digital pre-distortion maintained this high-level of efficiency while meeting the 3GPP ACLR requirements of -45 dBc in the adjacent channel and -50 dBc in the alternate channel. Unfortunately, these results were proprietary and could not be published.
Wrap Up
In this paper we showed results using digital predistortion to linearize a laboratory PA. We presented results showing 15 dB of ACLR correction on a 20 MHz bandwidth four-carrier UMTS waveform. An efficiency of 12% was achieved while meeting the 3GPP ACLR requirements. We also presented the hardware architecture based on a digital predistortion linearizer. This low-cost solution offers high performance and is an attractive alternative to feed-forward linearization and other more expensive options.
References
- H.S. Black, Translating System, U.S. Patent 1686792, issued Oct. 29, and U.S. Patent 2102671, issued Dec. 1937.
- S. C. Cripps, RF Power Amplifiers for Wireless Communication, Artech House, 1999.
- J.K. Cavers and M.W. Liao, Adaptive Compensation for Imbalance and Offset Losses in Direct Conversion Transceivers, IEEE Trans. Veh. Tech., vol. 42, no. 4, pp. 581-588, 1993.
- M. Faulkner, Adaptive Linearization Using Predistortion&$151;Experimental Results, IEEE Trans. on Veh. Tech., vol. 43, pp. 323-332, May. 1994.
About the Author
James Sills is a systems engineer in Intersil's Wireless Networking Product Group. He received a B.S. degree in electrical engineering from the University of Dayton and M.S. and Ph.D. degrees in electrical engineering from the Georgia Institute of Technology. James can be reached at jsills@intersil.com.
