As the adoption of Voice over IP (VoIP) has accelerated, it has taken on a variety of forms in different application spaces. More than 15 million VoIP ports are in use today, primarily in the infrastructure, often without consumers even being aware that they are talking over VoIP lines. Along with service provider deployments, corporations have experienced continued growth of VoIP usage with converged enterprise networks serving both data and telephony services, saving costs on toll phone calls and capital equipment.
Voice over Broadband (VoB) deployments such as Voice over digital subscriber line (DSL) and IP Cable Telephony, which promise Quality of Service offerings to the residential and Small Office Home Office (SOHO) markets, are still in their infancy. While "free" Internet calls can be made by a variety of home devices and related services, the call quality and service coverage is often inferior to traditional POTS (Plain old Telephone System).
The key to VoB success will lie primarily on successful business models that can offer features and services that cannot be met with current landline telephony solutions, offer a call quality experience that is compelling and superior to that of wireless services, and be deployed at an effective price model. These factors represent significant challenges to business development, which in turn drives secondary challenges for design engineers to develop the underlying products. Customer Premise Equipment VoIP gateways address the requirements of both the residential and the Small Office Home Office (SOHO) markets.
What are the engineering requirements necessary for deployment of VoIP in these segments? Design engineers working on customer premise VOIP gateways work with embedded silicon and software technology to define the specific features required for voice over packet systems. While it is desirable to "provision" the solution for possible future interfaces and features, these come with a cost. So the development engineers must not only demonstrate design skills but must also execute feature/cost tradeoff analysis. For example, if a product manager forecasts that a SOHO VoIP gateway solution will require an 802.11b wireless LAN interface in the future, such an interface will come with added cost. The engineering and product management teams must then answer a tough question: Is the upgradability to this wireless LAN interface compelling enough to potential buyers that they are willing to pay an extra premium on the VoIP gateway now?
In a market with continued downward pressure on consumer prices, coupled with corporate needs for respectable product margins, one of the most significant challenges facing CPE VoIP design engineers, is achieving a low- bill- of- material cost (BOM) for the product. While low- cost manufacturing and packaging costs are critical in achieving this goal, the core embedded solution will drive the majority of the cost. The core solution for a CPE VoIP gateway typically consists of DSP and RISC processors, associated memory for each, Ethernet Interface, analog codec and Subscriber Line Interface Circuitry (SLIC). The answer is not merely pursuing the lowest cost device. There are some important factors to achieving optimal costs, both for the current product and for upgrades.
Understanding sizing of the DSP and RISC processing power is important. DSP MIPS requirements vary, but can range from around 10 MIPS for a G.711 voice channel, up to 40 MIPs for certain low bit rate channels. But the architecture of the VoIP silicon may not directly translate RISC MIPS into voice throughput. For example, the associated cache operation can in some cases reduce the instructions per cycle. It is important to size the RISC rating to support not only the necessary VoIP processing requirements but to also include additional product feature execution.
Similar attention should be paid to memory allocation of the VoIP processing entities. Memory is typically a significant portion of the VoIP solution silicon cost. DSP memory may be integrated as part of the VoIP gateway chip. When evaluating VoIP solutions, it is important to understand how many and what type of channels are supported, and how, if possible, the memory can be expanded for future upgrades, for example enhancing the voice channel from G.711 to G.728 encoding.
Integration of multiple functions into a single silicon device usually results in cost reduction and is certainly something to consider when evaluating VoIP gateway devices. Given that the DSP, RISC and an Ethernet Interface are essential in nearly all CPE VoIP gateways, they should be part of an integrated chip. DSP memory is often included as well. RISC memory size requirements vary and typically use SDRAM so other than an internal cache, the RISC memory is usually external. The analog codec is now available on some CPE VoIP gateway chips, offering further cost reduction.
There is a point of diminishing returns, however on functional integration. Some CPE VoIP gateways require PCI or USB interfaces, while others require wireless LAN interfaces such as 802.11b. Inclusion of all of these interfaces in a single chip to cover all possible scenarios drives up the cost of the device and subsequently, solutions that do not use all of these peripherals pay an overhead for unused circuitry.
Wireless telephony providers typically provide inferior quality call connections compared to traditional POTS, with users dealing with inconveniences such as dropped calls, static, and echo, in order to benefit from mobility. Unless broadband service providers can offer compelling local and long distance savings over the current alternatives they must offer some other key attribute or killer app to play in the market. Delivering a QoS beyond that available through the public telephone system may enable VoIP to carve a niche in the telephony market.
As many have noticed, familiar voices do not sound the same over a POTS phone as they do in person. This is due to the sampling frequency used by the phone system, which is limited to 8KHz sampling for 64-kbit/sec voice transmissions. VoIP does not have this limitation, and so VoIP calls can achieve a much higher audio conversation fidelity. If the voice conversation does not terminate or traverse the POTs, higher fidelity voice coders can be used, resulting in higher quality audio. Hence, as VoIP implementations grow, design engineers must plan for the use of vocoders that support a wider 50-7000-Hz signal bandwidth versus 200 - 3400-Hz used in telephony today as a key differentiator.
See related chart
Currently, G.722 vocoders offer such a solution. G.722 is a narrowband voice compression algorithm at 24- and 32-kbit/sec at a 16-KHz sampling rate. The recently standardized wideband (adaptive multi-rate) AMR algorithm, G.722.2 offers the same as well as compatibility to GSM wireless networks. This means engineers must begin building CPE gateways that can be upgraded to allow for enough memory, and solution programmability to use these vocoders in the future without hardware retrofit.
Designing products with aggressive costs targets, in an immature market such as IP telephony presents multiple challenges to product engineers and managers. Features and interfaces, barely discussed during design time may become a must a year from now. Understanding cost and functional tradeoffs, is essential to successful CPE VoIP products and roadmaps.
